In the manufacture of integrated circuits, resistors are often formed during “front end of the line” (FEOL) processing, whereas capacitors are often formed during “back end of the line” (BEOL) processing. Interconnection of such resistors and capacitors is accomplished by a complicated series of conductive traces and vias formed in multiple layers of interlayer dielectric materials as part of the BEOL processing. Thus, interconnection of the FEOL resistors and BEOL capacitors requires multiple masks utilized during the multiple deposition and etching processes conventionally utilized during BEOL processing.